A comprehensive survey on Delaunay Triangulation: applications, algorithms, and implementations over CPUs, GPUs, and FPGAs

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dc.contributor.authorElshakhs, Yahia S.
dc.contributor.authorDeliparaschos, Kyriakos M.
dc.contributor.authorCharalambous, Themistoklis
dc.contributor.authorOliva, Gabriele
dc.contributor.authorZolotas, Argyrios
dc.date.accessioned2024-03-19T14:27:47Z
dc.date.available2024-03-19T14:27:47Z
dc.date.issued2024-01-15
dc.description.abstractDelaunay triangulation is an effective way to build a triangulation of a cloud of points, i.e., a partitioning of the points into simplices (triangles in 2D, tetrahedra in 3D, and so on), such that no two simplices overlap and every point in the set is a vertex of at least one simplex. Such a triangulation has been shown to have several interesting properties in terms of the structure of the simplices it constructs (e.g., maximising the minimum angle of the triangles in the bi-dimensional case) and has several critical applications in the contexts of computer graphics, computational geometry, mobile robotics or indoor localisation, to name a few application domains. This review paper revolves around three main pillars: (I) algorithms, (II) implementations over central processing units (CPUs), graphics processing units (GPUs), and field programmable gate arrays (FPGAs), and (III) applications. Specifically, the paper provides a comprehensive review of the main state-of-the-art algorithmic approaches to compute the Delaunay Triangulation. Subsequently, it delivers a critical review of implementations of Delaunay triangulation over CPUs, GPUs, and FPGAs. Finally, the paper covers a broad and multi-disciplinary range of possible applications of this technique.en_UK
dc.identifier.citationElshakhs YS, Deliparaschos KM, Charalambous T, et al., (2024) A comprehensive survey on Delaunay Triangulation: applications, algorithms, and implementations over CPUs, GPUs, and FPGAs. IEEE Access. Volume 12, 2024, pp. 12562-12585en_UK
dc.identifier.issn2169-3536
dc.identifier.urihttps://doi.org/10.1109/ACCESS.2024.3354709
dc.identifier.urihttps://dspace.lib.cranfield.ac.uk/handle/1826/21043
dc.language.isoen_UKen_UK
dc.publisherIEEEen_UK
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 International*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.subjectDelaunay triangulationen_UK
dc.subjectapplications of Delaunay triangulationen_UK
dc.subjectalgorithmic approaches to Delaunay triangulationen_UK
dc.subjectCPU implementation of Delaunay triangulationen_UK
dc.subjectGPU implementation of Delaunay triangulationen_UK
dc.subjectFPGA implementation of Delaunay triangulationen_UK
dc.subjectVoronoi diagramen_UK
dc.subjectCPUen_UK
dc.subjectGPUen_UK
dc.subjectFPGAen_UK
dc.titleA comprehensive survey on Delaunay Triangulation: applications, algorithms, and implementations over CPUs, GPUs, and FPGAsen_UK
dc.typeArticleen_UK
dcterms.dateAccepted2024-01-10

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