Identification of discrete-time output error model for industrial processes with time delay subject to load disturbance

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dc.contributor.author Dong, Shijian
dc.contributor.author Liu, Tao
dc.contributor.author Wang, Wei
dc.contributor.author Bao, Jie
dc.contributor.author Cao, Yi
dc.date.accessioned 2017-01-16T11:25:34Z
dc.date.available 2017-01-16T11:25:34Z
dc.date.issued 2016-12-22
dc.identifier.citation Dong S, Liu T, Wang W, et al., Identification of discrete-time output error model for industrial processes with time delay subject to load disturbance. Journal of Process Control, Volume 50, February 2017, Pages 40–55 en_UK
dc.identifier.issn 0959-1524
dc.identifier.uri http://dx.doi.org/10.1016/j.jprocont.2016.11.007
dc.identifier.uri http://dspace.lib.cranfield.ac.uk/handle/1826/11278
dc.description.abstract In this paper, a bias-eliminated output error model identification method is proposed for industrial processes with time delay subject to unknown load disturbance with deterministic dynamics. By viewing the output response arising from such load disturbance as a dynamic parameter for estimation, a recursive least-squares identification algorithm is developed in the discrete-time domain to estimate the linear model parameters together with the load disturbance response, while the integer delay parameter is derived by using a one-dimensional searching approach to minimize the output fitting error. An auxiliary model is constructed to realize consistent estimation of the model parameters against stochastic noise. Moreover, dual adaptive forgetting factors are introduced with tuning guidelines to improve the convergence rates of estimating the model parameters and the load disturbance response, respectively. The convergence of model parameter estimation is analyzed with a rigorous proof. Illustrative examples for open- and closed-loop identification are shown to demonstrate the effectiveness and merit of the proposed identification method. en_UK
dc.language.iso en en_UK
dc.publisher Elsevier en_UK
dc.rights Attribution-NonCommercial-NoDerivatives 4.0 International
dc.rights.uri http://creativecommons.org/licenses/by-nc-nd/4.0/
dc.subject Output error model en_UK
dc.subject Time delay en_UK
dc.subject Load disturbance en_UK
dc.subject Convergence en_UK
dc.subject Forgetting factor en_UK
dc.title Identification of discrete-time output error model for industrial processes with time delay subject to load disturbance en_UK
dc.type Article en_UK


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